Some years ago I got interested in software defined radio (SDR). It seemed a good excuse to beef up my DSP and programming expertise and the hardware and can run the gamut from fairly simple components to complete systems on a chip. In my experiments, I’ve used straightforward quadrature mixer which converts RF signals to baseband. The local oscillator for the mixer is a DDS board controlled by the PC. The audio signals are input to a low noise high gain audio amplifier which is connected to the audio input of a PC sound card. The block diagram of the system is shown below:
SDR Receiver Audio Amp
1. Local Oscillator
Any oscillator or frequency synthesizer can be used as a local oscillator. To generate the quadrature signals, the oscillator output frequency must be divided by four. The synthesizer I’ve been using is my Java based DDS Controller. The original software can be used, or a modified version (SDRTuner.zip) can be used which will display the divided frequency.
2. Mixer Amplifier
The fundamental theory of a software defined radio is that the RF signal is translated down to two baseband frequency signals. The first signal, the in-phase (I) signal is not phase shifted. The second signal, the Quadrature (Q) signal is phase phifted from the first by 90 degrees. The I and Q baseband signals are input to the two channels of a PC sound card where they are manipulated by the DSP software to demodulate the AM or SSB signals.
To derive the baseband signals, the mixer centered around U3 is used. U3 is a quad analog switch, configured as a Quadrature Sampling Detector (QSD), also known as the Tayloe detector.The mixer is driven by the outputs of U2, which is configured to generate overlapping signals at 0, 180, 90, and 270 degrees as shown below:
Note that most descriptions of the QSD based mixer assume that the quadrature timing signals are non-overlapping ie. each clock pulse has a 25% duty cycle. As seen in the timing diagram above this system uses overlapping clock pulses with a 50% duty cycle. Based on subjective use of the system, this seems to give adequate results, although it may affect the input impedance and noise. The circuit is also slightly simpler to implement than a non-overlapping design which may be advantageous when designing a wider range local oscillator.
As shown, each switch in U3 is closed and the input voltage level is held by the respective capacitor (C8 – C11). The 0 and 180 degree samples are differentially summed by U4 to generate the In-phase (I) signal, and the 90 and 270 degree signals are summed by U5 to generate the Quadrature-phase (Q) signals. A more detailed description of the QSD mixer can be found here: SFDR Part1.
There are a number of available software packages that can be used to demodulate the I and Q signals. Almost any program that uses a stereo sound card will work.
I started off by using SDRadio from Alberto (I2PHD) at www.weaksignals.com
This inspired me to try my hand at my own program based on the functionality of SDRadio. Alberto kindly provided me with the SDRadio source code, which is written in Delphi C++. I was using Microsoft Visual C++ at the time, so I decided to write my version as an MFC application. This kept me from being too lazy, but kept me on the right track concerning the basic principles. I used the “PortAudio” audio library at www.portaudio.com to interface with the sound card. Port Audio is up to version 19, I’m still using version 18, but that shouldn’t be a problem. I’ve called my program RxDisp, a screenshot is shown below:
4. RxDisp Operation
RxDisp operation is similar to that of SDRadio. The main display is the frequency spectrum of the digitized audio signal. The display is centered at 0 HZ, with a bandwidth depending on the sampling rate of the PC sound card (in this case + 22KHz). The slider bar above the frequency display selects the signal in the spectrum to be filtered and output to the sound card. The two slider bars below the frequency display set the bandpass filter characteristics. In USB or LSB mode, the upper slider bar sets the lower cut-off frequency, and the lower sets the higher cut-off frequency. In AM mode, the bandwidth, up to 10KHz, is set by the lower slider bar. The upper slider has no effect.
De-modulation mode can be selected by the radio buttons in the Mode group.
The amplitude resolution of the frequency display can be controlled by the drop down boxes in the Level group. “Max” sets the maximum level at the top of the display, and “Range” sets the amplitude resolution (dB/Div).
A Denoise operation can be enabled by the check box next to the Mode group.
AGC operation can be controlled by the slider bar at the right. Setting the slider bar sets the reference level of the AGC operation.
The receive operation can be disabled by pressing the Run/Stop button. Pressing the exit button, saves the setup in the registry and exits the program.
5. Things To Do
As mentioned, the original program was written as an MFC application in Visual C++. These days I’ve been working with Java and the Eclipse IDE, so this might be an excuse to re-work the program.
Currently, my DDS interface only operates up to 40 MHZ, which means the maximum quadrature receiver clock is only 10 MHz. These days with lower DDS prices it should be possible to increase the clock range significantly.